1. Field of the Invention
The present invention relates to semiconductor wafer cleaning and drying and, more particularly, to apparatuses and techniques for more efficiently removing residues from wafer surfaces after etch or ash operations.
2. Description of the Related Art
In the semiconductor chip fabrication process, it is well known that there is a need to clean and dry a wafer where a fabrication operation has been performed that leaves unwanted residues on the surfaces of wafers. Plasma etching operations and ashing operations may leave unwanted residues on a surface of a substrate. For example, in post dual damascene cleaning, both organic and inorganic residues remain present on the surface of the substrate after these operations. The organic residues may be remnants of the photoresist or intentionally produced by the reactants to protect the sidewalls of the features being formed during the etch process, while the inorganic remnants may be residues from sputtering operations or oxides of the lower metal interconnect layer. If not removed, the unwanted residual material and particles may cause, among other things, defects on the wafer surface and inappropriate interactions between metallization features. In some cases, such defects may cause the subsequent metal interconnect layer to develop voids in the metal lines or high resistance, or even voids, at the contact interface between current and previous metal layers, and hence the devices on the wafer to become inoperable. In order to avoid the undue costs of discarding wafers having inoperable devices, it is therefore necessary to clean the wafer adequately after fabrication operations that leave unwanted residues.
FIG. 1 is a simplified schematic diagram of a single wafer cleaning system utilizing a spray system for distributing a cleaning agent. Cleaning fluid is dispersed onto wafer 10 through nozzle 14. Typically wafer 10 is rotating while the fluid is being spayed. The initial spread of the cleaning fluid, depicted by region 12, is unevenly distributed. In addition, because of the centrifugal force from the rotation of wafer 10, the center region of the wafer is associated with a low mass transport of the fluid at the substrate/fluid interface due to the lower velocity of the fluid at the center of the wafer. However, the peripheral region of wafer 10 is associated with a high mass transport, due to the higher velocity of the fluid. Further exacerbating the cleaning consistency is that the residence time for the cleaning fluid with the surface of wafer 10 is not uniform across the wafer during initial dispense until the fluid is uniformly distributed across the substrate. That is, the center region of wafer 10, where the cleaning fluid is initially applied, has a high residence time, while the peripheral region has a low residence time. Thus, in cases where the substrate is sensitive to activity of the fluid being applied, i.e., residence time, the higher residence time regions may be prone to damage of the layer below the residues, i.e., the interconnect dielectric material, or the lower residence time regions may not be properly cleaned of residue.
Therefore, there is a need for a method and an apparatus that allows for consistent cleaning of post etch residues without damaging the underlying layer.